PCI-SIG
@pci_sig
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Official handle of the PCI-SIG consortium that owns and manages the widely adopted PCI Express I/O technology standard.
Joined March 2018
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#PCIExpress
5.0,
#PCISIG
’s newest specification, is now available to members.
#PCIe
5.0 doubles the bandwidth of PCIe 4.0 and increases performance in a variety of high performance markets. Read the press release to discover the features of PCIe 5.0:
0
25
34
#PCISIG
is proud to announce the upcoming
#PCIExpress
6.0 specification targeted for release in 2021.
#PCIe
6.0 will reach 64GT/s, utilize PAM-4 and pave the way for future innovation. Read the press release to discover the features:
#PCISIGDevCon19
2
12
19
"PCIe... is the catalyst for the development of many other technologies, such as storage, networking, GPUs, chipsets, and many other devices" -
@PaulyAlcorn
,
@tomshardware
. Read the full article and learn about new
#PCIe
4.0 and 5.0 features:
0
10
18
The
#PCIe
6.0 specification is on track for release in 2021. The next generation of PCIe technology will deliver blazing 64 GT/s per lane bandwidth. Read the
@HotHardware
article by
@Paul_B_Lilly
for details >
1
5
14
#PCIExpress
6.0, will stay ahead of the I/O bandwidth curve by delivering 256GB/s via x16 configuration. Discover how the
#PCIe
6.0 spec will accomplish these performance jumps:
@jonfingas
@engadget
0
2
12
The exhibit hall at
#PCISIGDevCon18
is open to members. Check out the technology demonstrations from our sponsors:
@Anritsu
,
@avery_design
,
@cadence
,
@Keysight
,
@mentor_graphics
,
@PLDAinc
,
@Synopsys
,
@tektronix
and
@TeledyneLecroy
0
4
10
The latest blog by
#PCISIG
Protocol Work Group Chair David Harriman of
@AmpereComputing
“
#PCIe
6.0 Specification Functionality Updates – Part 2” explores new link functionality, the introduction of
#L0p
and more. Read the blog >
0
2
8
#PCIe
6.0 technology with Flits (fixed-size flow control units) for lightweight FEC and
#PAM4
signaling means that the ecosystem can start building and validating designs to the new standard. Read the
@ServeTheHome
article for details >
0
1
8
#ICYMI
: The latest blog by
#PCISIG
Protocol Work Group Chair David Harriman of
@AmpereComputing
“
#PCIe
6.0 Specification Functionality Updates – Part 2” explores the addition of segment numbers to TLP headers and more. Read the blog >
0
2
8
Thank you to our
#PCISIGDevCon22
sponsors.
@alphawaveip
@Anritsu
@avery_design
@Cadence
@DiodesInc
@eTopus_IO
@grl_usa_emea
@Keysight
@rambusinc
@SamtecInc
@SerialTek
@siemenssoftware
@TeledyneLecroy
@ViaviSolutions
0
0
7
The next generation of the ubiquitous bus is once again doubling the data rate of a
#PCIe
lane to 8GB/second in each direction – and far higher for multi-lane configurations. Check out the
@anandtech
article by
@RyanSmithAT
for more >
0
1
7
#PCISIG
is excited to share
@SD_Association
’s latest innovation: MicroSD cards that use the
#PCIe
3.0 interface to deliver up to 985 MB/s transfer rate. Read the full release:
1
1
7
The
#PCIExpress
6.0 specification's 64 GT/s transfer rate will support major advancements for servers and foster innovation among a new generation of products leveraging the
#PCIe
6.0 spec. Look back at the evolution of previous specifications:
@Techgage
0
2
7
The upcoming
#PCIe
6.0 specification will enable technology in emerging markets such as
#AI
,
#MachineLearning
,
#HPC
and more. Read the article from
@HotHardware
to learn how the spec is built to support the next generation of data-demanding systems:
0
4
5
Version 0.5 of the
#PCIe
6.0 specification has been released and is on track to be finalized in 2021. The spec will deliver a 64GT/s data rate, PAM-4 encoding and will maintain backwards compatibility. Read more in the article from
@tomshardware
:
0
3
6
New
#PCIe
5.0 features include electrical changes to improve signal integrity, backward-compatible CEM connectors for add-in cards, and more. An article from
@tomshardware
@PaulyAlcorn
highlights everything you can expect from the 2019 release:
2
4
6
#DYK
that
#PCISIG
will be attending
@embedded_world
2019? We will be presenting the latest specification updates and more in the
@SD_Association
booth (3A-524). Explore the event website:
0
1
6
High bandwidth and low latency are two of the many reasons why
#PCIe
technology has evolved to become the primary I/O interconnect in the
#IoT
space. Read
@ElectronicDesgn
article by Debendra Das Sharma and Anil Kumar of
@intel
>
0
2
5
#PCISIGDevCon
allows members to explore
#PCIe
tech and promote the spec around the world. Thank you
@AllionTestLabs
,
@Anritsu
, iPasslabs,
@Keysight
,
@RohdeSchwarz
,
@SamtecInc
,
@SerialTek
,
@Synopsys
,
@TeledyneLecroy
, &
@ViaviSolutions
for making this event possible.
0
1
5
#TBT
: Our MOU agreement with
@ComputeExLink
(
#CXL
) establishes a liaison framework between the two organizations to ensure consistent joint messaging and marketing across areas of mutual interest. Read the blog for details >
0
1
5
#PCIe
6.0 specification, the next generation of the ubiquitous
#PCIe
bus is once again doubling the data rate of a PCIe lane, bringing it to 8 GB/s in each direction. Read the article by
@RyanSmithAT
in
@anandtech
for details >
0
0
4
#PCIe
7.0 specification represents an effective 8x increase in bandwidth compared to what’s actually available today. The first PCIe 5.0 devices should be available towards the end of this year, writes
@ExtremeTech
Read the article >
0
0
5
The PCIe 6.0 specification integrates industry-leading features, like
#PAM4
signaling and Flit-based encoding, to deliver a 64 GT/s data rate. Watch the video to learn how the PCIe 6.0 specification will meet the needs of data-centric applications >
1
0
5
Where will
#PCISIG
go next? Manmeet Walia will be presenting an update on the organization and
#PCIe
technology at
@embedded_world
in the
@SD_Association
booth (3A-524). Learn more about our upcoming industry events:
0
1
5
“PCIe 5.0 allows up to 128 GB/s bandwidth, twice that of PCIe 4.0. The PCIe 5.0 architecture also implements electrical changes to improve signal integrity and mechanical performance of connectors”-
@tomshardware
. Learn the highlights of the
#PCIe
5.0 spec:
0
6
4
Why is
#PCIe
so power efficient? It can scale both the the number of lanes and frequency.
@JustinWenck
provides a
#PCISIG
update in his
#FMS2018
presentation
0
1
5
#PCISIG
member Dean Gonzales of
@AMD
is one of the recipients of the
#PCISIGDevCon23
Chairperson’s Award. Read this interview to learn more about how he has contributed to the electrical
#PCIe
specification >
0
0
4
And that's a wrap on Day 1 of the
#PCISIGDevCon19
. Thank you to our sponsors for making this event such a success:
@Cadence
,
@PLDAinc
,
@SamtecInc
,
@synopsys
,
@TeledyneLecroy
,
@Anritsu
,
@Keysight
,
@mentor_graphics
,
@Mobiveil
, and
@tektronix
0
2
5
We want to offer a warm welcome to
@PintoYosi
, chairman of
@SD_Association
, for providing a great overview of the relationship between
#PCIe
and
#SDExpress
0
2
4
#PCISIG
recently announced a marketing MOU agreement with
@ComputeExLink
to increase awareness of industry standard interconnect technologies and provide collaborative educational messaging. Read the blog >
0
0
3
Want to learn more about the
#PCIe
7.0 specification? Listen to the latest
@StorageUnpacked
podcast with
#PCISIG
President Al Yanes for a deep dive on upcoming improvements >
0
2
4
#PCISIG
President and Board Chair Al Yanes recently sat down with
@storagereview
podcast host
@BMBeeler
to discuss the design aspects, profiles and system changes needed to take advantage of the
#PCIe
6.0 specification. Listen to the podcast >
0
1
4
Join us on Wednesday, Jan. 25 at 8:00 am PT for the upcoming
#PCISIG
webinar hosted by
@TeledyneLecroy
. The talk will provide an overview of
#PCIe
5.0 protocol and electrical compliance testing. Register here>
0
1
4
“MicroSD cards are about to get a whole lot faster, thanks to the newly announced microSD Express format that the SD Association announced at MWC 2019”-
@cgartenberg
,
@verge
. Discover how
#PCIe
technology has made this possible:
@SD_Association
0
1
4
#DYK
that many
#PCISIG
member companies have joined the
#OCPVirtualSummit
virtual expo hall? We encourage you to register for the event and connect with these companies to learn how they are utilizing
#PCIe
technology in
#OCP
use cases:
@OpenComputePrj
0
1
4
Greetings from day 2 of
@Supercomputing
in Dallas, TX. Visit the
@SNIA
Open Standards Pavilion (booth
#2840
) for updates on
#PCIe
technology.
0
2
4
Each new generation of
#PCIe
technology meets the needs of various systems. The PCIe 6.0 spec will provide support for bandwidth-intensive systems such as
#HPC
clusters or large
#supercomputers
. Discover the potential of this spec:
@TweakTown
@punx223
0
1
4
Today’s the day. Manmeet Walia’s
#PCISIG
presentation is at 12:30pm in the
@SD_Association
booth at
@embedded_world
2019. Click here for more details:
0
1
4
#TBT
to
@JustinWenck
’s presentation, “PCI Express 4.0 and 5.0: The Future of NVMe Technology” at
@NVMexpress
Annual Member’s Meeting last week.
#PCISIG
is proud to work with another leading industry organization like
#NVMExpress
.
#NVMeAnnualMembersMeeting
0
1
4
Thank you to our
#PCISIGDevCon2021
sponsors
@adnacom
,
#AlphawaveIP
,
@AsteraLabs
,
@avery_design
,
@Cadence
@grl_usa_emea
,
#MissingLinkElectronics
,
@Mobiveil
,
@PLDAinc
,
@SamtecInc
,
@Siemens
,
@synopsys
,
@TeledyneLecroy
,
@ViaviSolutions
Register here >
0
1
4
Attending
@DesignConEvent
2022 on April 5-7 in Santa Clara, CA? Make sure to attend the
#PCISIG
and
@ComputeExLink
panel, “
#CXL
and
#PCIe
Technologies: The Next Generation of Interconnects” on Tuesday, April 5 at 4:45 pm PT >
#DesignCon
0
1
4
#PCISIGCompliance
Workshop
#110
has come to an end. Official
#PCIe
4.0 spec testing was ushered in and now the PCIe 4.0 spec will be adopted by an even wider range of tech. We sincerely thank our Gold Suite Hosts for contributing:
@Anritsu
@Keysight
@tektronix
&
@TeledyneLecroy
1
3
4
Thank you to our
#PCISIG
DevCon Seoul sponsors
@Anritsu
@Cadence
@grl_usa_emea
@Keysight
@SamtecInc
@SerialTek
@synopsys
@TeledyneLecroy
@ViaviSolutions
0
1
4
Today is the last day of
#SC23
. The show floor closes at 3:00 pm today so make sure to visit the
#PCISIG
booth
#1401
and check out the
#PCIe
demos.
@AsteraLabs
#DolphinICS
@Synopsys
@tektronix
0
1
4
#PCISIG
is exhibiting as part of the
@SNIA
Open Standards Pavilion
@Supercomputing
. If you’re onsite, stop by and say hello!
1
2
4
#PCISIG
’s new specification,
#PCIExpress
5.0, opens up a world of possibilities for new age applications.
#PCIe
5.0 doubles the bandwidth of PCIe 4.0 and maintains backwards compatibility. Become a member and help shape future specs:
0
0
4
The
#IsraelDevCon2018
exhibit hall is now open. Don't miss our sponsors demonstrating their solutions:
@avery_design
,
@Keysight
,
@mentor_graphics
,
@PLDAinc
,
@Synopsys
,
@TeledyneLecroy
,
@ValensAuto
and
@ViaviSolutions
0
5
4
If you're onsite at
#PCISIGDevCon22
Israel, visit sponsor company
@synopsys
to learn more about how they support the
#PCIe
technology ecosystem
0
0
3
The goal is to double the available bandwidth of its predecessor, which in
#PCIe
7.0 specification’s case means that a single PCIe 7.0 lane will be able to transmit at speeds of up to 32GB per second, writes
@AndrewWrites
Read the
@arstechnica
article >
0
0
3
Jignesh Shah from
@SamtecInc
explains the new
#PAM4
encoding featured in the
#PCIe
6.0 specification. Watch the full video to learn more>
0
1
3
The latest “Meet the
#PCISIG
Members” blog features
@AsteraLabs
as they discuss their participation in developing
#PCIe
technology and the advantages of PCI-SIG membership. Read the blog >
0
0
3
ICYMI:
#PCISIG
member
@MicrochipTech
discusses how
#PCIe
technology serves as an integral part of
#automotive
safety. Watch the video >
0
1
3
#PCISIGDevCon22
kicks off tomorrow (6/21) in Santa Clara, CA. Unable to attend the event in person? Free virtual attendance is also available for PCI-SIG members. View the conference agenda on our website >
0
0
3
Are you attending
#FMS22
? Visit the PCI-SIG pod in the
@SD_Association
booth to learn more about how SD Cards and
#PCIe
technology work together. We look forward to seeing you at booth 833 until 7:00 pm tonight.
0
1
3
#ICYMI
: Check out the latest
#PCISIG
webinar hosted by
@TeledyneLecroy
. The talk provided an overview of
#PCIe
5.0 protocol and electrical compliance testing. Watch the full webinar on YouTube >
0
0
3
With
#PCIe
5.0 technology SSD units expected to reach speeds of 13,000 MB/s, the first
#PCIe
6.0 technology
#SSDs
could perform at speeds of up to 25,000 MB/s, according to
@Gadget_Tendency
See the article for details >
0
1
3
#SC23
officially kicks off today in Denver, CO. Be sure to stop by the
#PCISIG
booth
#1401
to view
#PCIe
demos from
@AsteraLabs
, Dolphin ICS,
@Synopsys
and
@tektronix
0
1
3
#PCIe
architecture is a natural fit for the automotive market, given its scalability, performance and durability. Watch the video from
@MicrochipTech
for a look at PCIe technology growth in
#automotive
>
0
0
2
#PCISIG
has reached a milestone on the
#PCIe
spec roadmap: Version 0.5 of the PCIe 6.0 spec was released to members. The spec will offer a 64GT/s data rate for emerging applications such as
#AI
and machine learning. Learn more:
@tomshardware
@NBroekhuijsen
0
1
3
The recent
#PCISIG
webinar hosted by
@TeledyneLecroy
explores Protocol and Electrical Compliance Testing for
#PCIe
5.0 systems. Watch the webinar on YouTube >
0
1
3
#PCISIG
Marketing Work Group Co-Chair Scott Knowlton of
@synopsys
is one of the recipients of the
#PCISIGDevCon23
Chairperson’s Award. Read this interview to learn more about how he works to advance industry knowledge of the
#PCIe
specification >
0
2
3
The
#PCIe
6.0 spec's 64 GT/s transfer rate will pave the way for increased performance in new tech innovations, while maintaining backwards compatibility with previous specs. Discover the features of PCIe specs:
@appleinsider
@MalcolmOwen
0
3
3
#PCISIG
will be exhibiting as part of the
@SD_Association
booth at
#FMS2022
. If you’re attending the event, visit us in booth
#833
for the latest
#PCIe
technology updates.
#FlashMemorySummit
0
0
3
0
0
3
The
#PCISIGDevCon24
returns to Taipei, Taiwan today and tomorrow. The event will include presentations from
#PCISIG
members discussing their implementations of
#PCIe
technology. See the agenda >
0
1
3
Thank you to our
#PCISIGCompliance
Workshop
#111
Gold Suite approved test equipment vendors:
@Anritsu
,
@Keysight
,
@TeledyneLecroy
and
@tektronix
. With your contributions, we were able to bring
#PCISIG
testing to Asia and continue expanding the ecosystem of
#PCIe
-enabled products.
0
0
3
The
#PCIe
6.0 specification reached a milestone with v0.7 and is on track for finalization later this year. It will increase the data rate to 64GT/s via PAM-4 encoding. Learn more from
@tomshardware
>
0
3
3
Thank you to our
#PCISIGDevCon18
platinum sponsors
@cadence
,
@PLDA
,
@Synopsys
and
@TeledyneLecroy
for their ongoing support of PCI-SIG. This free educational event is open to all members, get the event details:
0
0
3
Thank you to our
#PCISIGCompliance
Workshop 112 Gold Suite approved test equipment vendors:
@Anritsu
,
@Keysight
,
@TeledyneLecroy
and
@tektronix
. These workshops are a valuable resource for our members to test their
#PCIe
technology products before they enter the field.
0
0
3
